We know you're out there ;-)

Hi everyone!
There has been a lot going on around the vMAGIC project the last few weeks and we know from several people that they are using the library. However, the more we know about your work with vMAGIC, the better we can serve your needs. So please, give us a short note on your projects:

• What are you doing with vMAGIC?
• Where are the shortcomings, what needs to be improved?
• Do you require new features?
• Any general hints on the future direction of the project?

We always appreciate a comment to our forums, but please don’t hesitate to contact us directly. Any feedback is welcome!

Coming up next

Hi Everyone!
vMAGIC is reaching a more and more mature state these days, such that a 1.0 release is not that far away anymore. You can help us by providing your opinion/requirements in the  vMAGIC forum on sf.net. Please check out our demo page, where the power of vMAGIC is presented by a few small examples using the API&Parser.

Nevertheless there is more to come. Currently we are working on a few extensions to the API and some more projects using the API

• VHDL Linter: Everyone knows what linting is and why it is sensible... anyhow there does not seem to be any free linter around for VHDL. We do not claim to provide a linter as powerful as the comercially available ones, but it'll be useful anyway!
• More VHDL Semantics: Currently, vMAGIC understands only very little about VHDL semantics, i.e., name analysis is performed to resolve ambiguities and to resolve the scope of variables. Next stepts will be to identify registers and FSMs, such that the "high level meta classes" of the API can be generated by the parser as well.
• VHDL Editor: Also using xemacs? I loved the tool when I first saw the power of the VHDL mode, however it is a bit outdated and a more fancy IDE for VHDL is in order... we're on it. (Btw. If this sounds familiar... yes there is a tool with a similar claim, but this one is open source and free ;-))
• I/O capabilities: Currently, vMAGIC has the ability to read and write VHDL. However, other formats are sensible as well: XML as a general exchange format between different applications will be implemented as input and output format. We are also looking into the possibility of creating a special XML output with some flattening (resolving generate statements, attaching attributes, etc.) for these guys.
  Another output format will be... vMAGIC code. Strange though it seems this is very helpful: If you are dealing with templates a lot, you might find it pretty exhausting to interact with the existing code. This output feature will allow you to generate the Java code required to output the template, and you can put your code directly in there. Still sounds insane? Work with templates and you'll see ;-)

What is vMAGIC

vMAGIC is an API written in Java by Christopher Pohl and  Ralf Fuest which helps you to create programs related to VHDL. vMAGIC comprises of three parts:

• a VHDL'93 compliant parser,
• a programming model to easily create and modify VHDL'93 constructs,
• and a VHDL'93 Writer which will convert your models back to plain and readable VHDL code

vMAGIC stands for "VHDL Manipulation and Generation Interface" and is intended for users who want to create their VHDL code by using code-generators. This is mainly useful in areas where, i.e., a template has to be modified many times for different situations, while it is impossible or impracticable to use VHDL generics. Imagine a bus interface with address-decoder: It usually has a very regular structure but it is nearly impossible to generate it using generics.

Go to the  vMAGIC Download page on Sourceforge.net to get the current version of the library.

vMAGIC provides an efficient three steps process to customize templates:

• First, the template is parsed and stored in an internal format. It is not necessary to read in any templates, but if there is code that doesn't change between different implementations, it is much easier to read it in instead of generating it using the vMAGIC programming model.
• Second, any VHDL statement can be generated and inserted into the existing code by using so called meta objects. Meta objects represent VHDL constructs of different complexity (Statements, Registers, Muxes, ...) and allow for simple generation of new code, while providing the flexibility to generate any low level construct as well as high level ojects with the same interface. All operations are executed on an internal data format, such that certain coding errors (like syntactical) are barred.
• Third and last, the newly modified code/template can be written to VHDL files, which can then be synthesized directly.

vMAGIC is not restricted to templates,

but it is easiest to explain what it does utilizing templates. Take your time to browse the documentation and see what vMAGIC can do for you, here are some ideas:

• Implement your algorithms on top of VHDL: You can do optimizations on code level? Use vMAGIC so your application becomes more portable and accessible to others.
• Write generic code generators: VHDL generics are fine but by far not flexible enough to do everything with them. Write your own code generator with vMAGIC, most of the annoying stuff has already been dealt with in vMAGIC.
• Extract information from your code: List entities, architectures, and their properties. Coun't your registers and multiplexers...
• Automatically generate interfaces: Want to embed an IP-core into a larger System? Use vMAGIC to create a GUI that specializes on your design, specify modules to be attatched and let your code generator do the rest.
• Check interfaces: Afraid that your students destroy your valuable FPGAs? Make sure your interfaces comply to your rules by using vMAGIC... or generate them anyway.

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